Digital Hardware Engineer

Summary:

VIAVI (NASDAQ: VIAV) has a 100+ year history of technical innovations that have evolved to keep pace and address our customers’ most pressing business issues.

We make equipment, software, and systems that help to plan, deploy, certify, monitor, and optimize all kinds of networks - like those for mobile phones, service providers, large businesses and data centers. VIAVI is also a leader in high performance thin film optical coatings and engineered diffusers, providing light management solutions to anti-counterfeiting, consumer electronics, automotive, defense and instrumentation markets.

We are the people behind the products that help keep the world connected – at home, school, work, at play, and everywhere in between. VIAVI employees are fierce about supporting customer success and we welcome people who bring their best every day to the company - to question, to collaborate and to push for solutions that will delight our customers.

Based in Saint-Étienne, VIAVI Solutions France is looking for a Senior Digital Electronics Design Engineer to join its R&D department (60 people). You will design high-performance electronic boards at the core of fiber-optic test and measurement instruments — from hardware architecture and schematics through PCB routing, prototype qualification and production release.

The role requires 5+ years of hardware design experience, strong digital and mixed-signal skills, and proficiency in FPGA-based design (VHDL/Verilog), high-speed buses (PCIe, USB 3.x, GbE) and EDA tools (Cadence or equivalent).

You'll be reporting into our Engineering Group Manager and will be at the heart of the design of high-performance electronic boards integrating optical acquisition chains, FPGA components and high-speed digital interfaces. Your work feeds directly into product ranges sold worldwide.

Duties & Responsibilities:

• Define the hardware architecture of electronic boards, accounting for system constraints (power, thermal, signal integrity, EMC) and product specifications.

• Design and validate electronic schematics; manage PCB routing and oversee prototype manufacturing.

• Test, debug and qualify prototypes; write test plans and qualification reports through to production release.

• Contribute to system integration in close collaboration with the embedded software and mechanical teams, and take part in architecture reviews.

• Monitor component and solution availability; evaluate and qualify new technologies relevant to VIAVI products.

• Document all developments (bills of materials, calculation notes, definition files) in line with the department’s quality processes.

Pre-Requisites / Skills / Experience Requirements:

Required Skills:

• An engineering degree in electronics (classical academic background preferred: CPGE / engineering school).

• At least 5 years of hardware design experience in an industrial R&D environment.

• Strong command of high-speed digital design, with a solid understanding of the analogue constraints (noise, dynamic range, linearity) inherent in measurement instruments.

• Ability to work in a cross-functional team (software, mechanical, manufacturing) and communicate effectively with international stakeholders.

• Fluency in English and French.

• Self-driven, rigorous and curious, with a strong appetite for cutting-edge technologies and a genuine interest in solving complex problems.

Required Technologies:

• Digital design around FPGAs, SoCs or microprocessors and their ecosystem (DDR memories, DC-DC power, clocks, high-speed buses: PCIe, USB 3.x, Ethernet GbE...).

• VHDL/Verilog development for programmable logic (Xilinx/Intel).

• EDA tools: proficiency in Cadence or equivalent for schematic capture and PCB routing review.

• Knowledge of signal integrity and electromagnetic compatibility (EMC); simulation experience (HyperLynx, SIwave or similar) is a plus. 

• C/C++ and Python for board bring-up, testing and measurement automation.

If you have what it takes to push boundaries and seize opportunities, apply to join our team today.

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